Samsung Starts Production of 8 Gb DDR4-3600 ICs Using 2nd Gen 10nm-Class Tech
by Anton Shilov on December 20, 2017 10:00 AM EST
Samsung late on Wednesday said that it had initiated mass production of DDR4 memory chips using its second generation '10 nm-class' fabrication process. The new manufacturing technology shrinks die size of the new DRAM chips and improves their performance as well as energy efficiency. To do that, the process uses new circuit designs featuring air spacers (for the first time in DRAM industry). The new DRAM ICs (integrated circuits) can operate at 3600 Mbit/s per pin data rate (DDR4-3600) at standard DDR4 voltages and have been validated with major CPU manufacturers already.
As it usually happens with Samsung’s major DRAM-related announcements, the news today consists of two parts: the first one is about the new DDR4 IC itself, the second part is about the second generation '10 nm-class' (which Samsung calls '1y' nm) manufacturing technology that will be used for other DRAM products by the company. Both parts are important, but let’s start with the new chip.
Samsung’s new DDR4 chip produced using the company’s 1y nm fabrication process has an 8-gigabit capacity and supports 3600 MT/s data transfer rate at 1.2 V. The new D-die DRAM runs 12.5% faster than its direct predecessor (known as Samsung C-die, rated for 3200 MT/s) and is claimed to be up to 15% more energy efficient as well. In addition, the latest 8Gb DDR4 ICs use a new in-cell data sensing system that offers a more accurate determination of the data stored in each cell and which helps to increase the level of integration (i.e., make cells smaller) and therefore shrink die size.
Samsung says that the new 8Gb DDR4 chips feature an “approximate 30% productivity gain" when compared to similar chips made using the 1x nm manufacturing tech. UPDATE 12/21: Samsung clarified that productivity gain means increase in the number of chips per wafer. Since capacity of Samsung's C-die and D-die is the same, the increase in the number of dies equals the increase in the number of bits per wafer. Therefore, the key takeaway from the announcement is that the 1y nm technology and the new in-cell data sensing system enable Samsung to shrink die size and fit more DRAM dies on a single 300-mm wafer. Meanwhile, the overall 30% productivity gain results in lower per-die costs at the same yield and cycle time (this does not mean that the IC costs are 30% lower though) and increases DRAM bit output.
Samsung does not release exact smallest hhalf-pitchsize of the new DRAMs (the feature size used to give names to DRAM process technologies), so at this point we do not know any details about the new chip’s geometries. Given that we are dealing with a 1y process, it logical to assume that the smallest half pitch size is from 14nm to 16 nm, but this is a speculation at this point. What we do know is that Samsung’s 1y nm process technology continues to use ArF (argon fluoride) immersion lithography tools presumably with quadruple patterning (so no EUV). Meanwhile, to reduce parasitic capacitance, Samsung placed air spacer around its bit lines, which helps to increase DRAM performance.
Speaking of performance, it is noteworthy that Samsung’s C-die DRAMs have not been used by companies like Corsair and G.Skill for their leading-edge memory modules for enthusiasts. Apparently, both companies still use the time-proven Samsung B-die ICs made using 20 nm process technology. It remains to be seen whether the aforementioned manufacturers jump to the new 1y nm 8 Gb DDR4 ICs and when.
Samsung says that the new in-cell data sensing system as well as air spacers will be used to make other types of DRAM, including DDR5, HBM3, LPDDR5, and GDDR6 — meaning that these two elements will be used for years to come. Of course, it will be a while before the first three standards enter commercial production, but GDDR6 with the aforementioned enhancements could be produced in the foreseeable future and using the 1y nm process.
CPU developers (likely Intel, AMD, IBM, Qualcomm, etc.) have already validated the new 8 Gb DDR4-3600 memory chips produced using Samsung’s 2nd generation 10 nm-class process technology. The next step for Samsung is to validate memory modules with PC makers and put these modules into the next-gen systems. It is noteworthy that this time Samsung only displays the new 8 Gb ICs on an SO-DIMM, but not on a desktop-class memory module. It is unknown whether this has something to do with product positioning and/or Samsung's own plans for modules (e.g., laptops are addressed first), but previously Samsung always published pictures of its latest DRAMs both on DIMMs and SO-DIMMs.
Along with the announcement of the new 8 Gb DDR4 DRAM IC, Samsung also said that it would ramp up production of memory (not only DDR4, but also mobile DRAM, etc.) using both of its 10 nm-class fabrication processes to meet “growing demand for DRAM in premium electronic systems worldwide”.
Related Reading
- Samsung Begins To Produce DDR4 Memory Using '10nm Class' Process Tech
- Samsung Pre-Announces 16 Gbps GDDR6 Chips for Next-Gen Graphics Cards
- Samsung Starts Production of 512 GB UFS NAND Flash Memory: 64-Layer V-NAND, 860 MB/s Reads
- Samsung Starts Mass Production of Chips Using 10nm Low Power Plus (10LPP) Process Tech
- Samsung’s 8LPP Process Technology Qualified, Ready for Production
- Samsung Details 11LPP Process Technology: 10 nm BEOL Meets 14 nm Elements
Source: Samsung
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III-V - Wednesday, December 20, 2017 - link
Eventually they will. Possible slight decrease next year, definitely coming crashing down in 2019. There's a lot of production expansion in the works, and once we see those facilities ramp up, we'll finally get the price war we need.limitedaccess - Wednesday, December 20, 2017 - link
I don't understand the why some people are quick to dismiss this when these exact same players have been caught before.15 years ago when there were much more memory manufacturers in the market Samsung, Hynix, and Micron were all guilty of anti-trust violations acting as a part of a cartel.
Now Samsung, Hynix and Micron have 95% of memory market share.
Conveniently all 3 under estimated memory demand just slightly. in that there capacity is just nearly enough to fulfill demand but just slightly behind the demand curve.
Conveniently neither 3 have been approving extensive capex expenditure.
Conveniently none of the 3 is attempting take market share from each other.
Conveniently all 3 will have significant capacity expansion coming online and capex ramp in 2019. Why? There are expectations that Chinese capacity will start to come online, the Chinese are currently outsiders.
Incumbents will also start to enact measures, including IP litigation, to prevent Chinese companies from entering the market. Don't be surprised if these measures succeed that capex expenditure all of sudden to start dropping.
t.s - Thursday, December 21, 2017 - link
Spot on!mitsuhashi - Thursday, December 21, 2017 - link
Hey limitedaccess -- are you the same dumbass from SlickDeals?Samsung upped their planned $13.5B investment to $26.1B for their semiconductor fab in Korea.
https://www.anandtech.com/show/11603/samsungs-mult...
Another $7B for their NAND fab in China.
https://www.eetimes.com/document.asp?doc_id=133220...
The latter article will also states:
"The company has been investing aggressively as industry-wide capital spending is expected to soar by 20 percent in 2017, largely driven by Samsung, according to market watcher IC Insights. The key driver behind strong growth this year has been the memory chip segment.
Samsung’s full-year 2017 capital expenditures could range from $15 billion to $22 billion. If Samsung spends $22 billion this year, total semiconductor industry capex could reach $85.4 billion, representing a 27 percent increase over the $67.3 billion the industry spent in 2016, IC Insights said."
So in your head, $33B in fab investments by a single company = not competing, and "a 27 percent increase over the $67.3 billion the industry spent in 2016" on capital expenditures = a 0% increase? Yeah, keep your head in the sand, buddy.
Beaver M. - Thursday, December 21, 2017 - link
Sad to see that so many people dont have a clue how price fixing works.I guess thats why it still happens all the time...
limitedaccess - Thursday, December 21, 2017 - link
You realize the explanation is even in the articles you are referring to? Read the eetimes article in context, notice how it even spells out that Samsung's ramp is timed with the ramp of China's own industry.They cannot count on China not aggressively pursing market share. The eetimes article even brings up corruption issues with Samsung at the end of the article.At the end the current DRAM players were already guilty of collusion when the market was much more diversified. Now 3 players, all of which were involved before, currently occupy 95% market share. You think the past fines are deterrents? $1 billion spread over the entire industry? Micron just reported a year to year increase of over $2.5 billion over one quarter.
Round - Thursday, January 4, 2018 - link
Mitsubishi,As a long time reader/lurker, your post finally got me to join and comment.
Your question, i.e., "Hey limitedaccess -- are you the same dumbass from SlickDeals?" leaves me wondering if you have any, even a small understanding of how the industry works. it appears doubtful, but perhaps if you were to direct us to your slickdeals posts we could confirm your status.
Right now, it appears that your significant lack of understanding about what's going on in the memory markets, the Chinese market entry and its repercussions, motivations for price fixing, and a major key to the whole fraud, the timing of the events (which you clearly don't understand), excludes you from any serious conversations.
Beaver M. - Thursday, December 21, 2017 - link
Exactly. The same thing as in the HDD sector.FullmetalTitan - Thursday, December 21, 2017 - link
Samsung opened FAB 3 in China specifically to address global (NAND) memory demands.The Korean complex produces all leading edge techs (10nm DRAM and SoC).
Their U.S. foundry supplies dozens of customers.
There is SURE to be another FAB announced by 2020.
But I guess that isn't enough investment in new tech and production
Adramtech - Saturday, December 23, 2017 - link
"Conveniently all 3 under estimated memory demand just slightly. in that there capacity is just nearly enough to fulfill demand but just slightly behind the demand curve"Are you serious? Do you think forecasting worldwide memory demand is an exact science? If it were there would never be low prices, ever.
Why would any one of these companies spend $5B to build a fab just to risk creating oversupply like 2016 where DRAM drops like a rock, so they can go out of business and Samsung can be a Monopoly, or so the government can bail them out?
"Conveniently none of the 3 is attempting take market share from each other."
False, First, Samsung has 50% market share, any more and they run afoul of anti trust concerns. They're not going on a suicide mission for more of the pie when the pie itself is getting larger. Second, SK Hynix and Micron are absolutely trying to take market share from Samsung or each other. Higher memory prices helps Samsung and hurts Apple, of course they want that scenario to play out as long as possible.
"Conveniently all 3 will have significant capacity expansion coming online and capex ramp in 2019."
Um no, First, it takes 2-3 years to build a fab with any meaningful output. To complete a plant before 2019, they would have had to plan a fab in 2016, which was right in the middle of when chip companies were losing money and just struggling to stay alive. The only company in position to do that back then was Samsung. As far as Capex expenditure, is $26B not enough for you? Also, Micron's capex is currently highest in company history.