At the tail end of last year, one of the key launches in the creator/workstation processor market was AMD’s latest 3rd Generation Threadripper portfolio, which started with 24-core and 32-core hardware, with a strong teaser that a 64-core version was coming in 2020. Naturally, there was a lot of speculation, particularly regarding sustained frequencies, pricing, availability, and launch date. This week at CES, we can answer a couple of those questions.

The new 64-core AMD Threadripper 3990X is essentially a consumer variant of the 64-core EPYC 7702P currently for sale in the server market, albeit with fewer memory channels, fewer enterprise features, but a higher frequency and higher TDP. That processor has a suggested e-tail price (SEP) of $4450, compared to the new 3990X, which will have a $3990 SEP.

AMD HEDT SKUs
AnandTech Cores/
Threads
Base/
Turbo
L3 DRAM
1DPC
PCIe TDP SRP
Third Generation Threadripper
TR 3990X 64 / 128 2.9 / 4.3 256 MB 4x3200 64 280 W $3990
TR 3970X 32 / 64 3.7 / 4.5 128 MB 4x3200 64 280 W $1999
TR 3960X 24 / 48 3.8 / 4.5 128 MB 4x3200 64 280 W $1399
Second Generation Threadripper
TR 2990WX 32 / 64 3.0 / 4.2 64 MB 4x2933 64 250 W $1799
TR 2970WX 24 / 48 3.0 / 4.2 64 MB 4x2933 64 250 W $1299
TR 2950X 16 / 32 3.5 / 4.4 32 MB 4x2933 64 180 W $899
TR 2920X 12 / 24 3.5 / 4.3 32 MB 4x2933 64 180 W $649
Ryzen 3000
Ryzen 9 3950X 16 / 32 3.5 / 4.7 32 MB 2x3200 24 105 W $749

Frequencies for the new CPU will come in at 2.9 GHz base and 4.3 GHz turbo, which is actually a bit more than I was expecting to see. No word on what the all-core turbo will be, however AMD's EPYC 7H12, a 64-core 280W CPU for the HFT market, is meant to offer an all-core turbo from 3.0-3.3 GHz, so we might see something similar here, especially with aggressive cooling. Naturally, AMD is recommending water cooling setups, as with its other 280W Threadripper CPUs. Motherboard support is listed as the current generation of TRX40 motherboards.

Although we don't put much stock in vendor supplied benchmark numbers, AMD did state that they expect to see Cinebench R20 MT numbers around 25000. That's up from ~17000 on the 3970X. This means not perfect scaling, but for the prosumer market where this chip matters, offering +47% performance for double the cost is often worth it and can be amortized over time.

The other element to the news is the launch date. February 7th is probably earlier than a lot of us in the press expected, however it will be interesting to see how many AMD is able to make, given our recent discussions with CTO Mark Papermaster regarding wafer orders at TSMC. As this chip more closely resembles the price of AMD’s EPYC lineup, we might actually see more of these on the market, as they will attract a good premium. However, the number of users likely do put close to $4k onto a high-end desktop CPU and not go for an enterprise system is a hard one to judge.

AMD recommends that in order to maintain performance scaling with the 3990X that owners should have at least 1 GB of DDR4 per core, if not 2 GB. To be honest anyone looking at this chip should also have enough money in the bank to also get a 128 GB kit of good memory, if not 256 GB. As with other Threadripper chips, AMD lists the support as DDR4-3200, but the memory controller can be overclocked.

We should be talking with AMD soon about sampling, ready for our February 7th review. Please put in some benchmark requests below.

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  • SanX - Monday, January 6, 2020 - link

    Ian,
    Take for the test the simple linear algebra Ax = B solution with randomly filled dense matrix 20000x20000 or more. For the intrigue use Intel MKL library which now supports AVX512 and if AMD will beat Intel processors even on the Intel own field then the game for Intel is over. Fortran test like that is only ~10 lines of source code and will run with many free Fortran compilers. Let me know if you need the source text
    Reply
  • Everett F Sargent - Monday, January 6, 2020 - link

    AMD does not support AVX-512 in hardware. Reply
  • japhmo - Tuesday, January 7, 2020 - link

    I think the point is that if AMD-Threadripper can beat/be competitive with Intel on an Ax=B solution where the Intel-based workstation is able to use AVX-512 commands, while the AMD-based workstation is not, then this new chip would be an absolute win for AMD (until Intel can come out with something competitive...). I would also be very interested in this kind of test, as I am looking to build in-house-systems to run the size of problem (~256-512Gb-ish home-brew parallel finite element codes) that could easily fit onto a single Threadripper-based compute box. Reply
  • Everett F Sargent - Tuesday, January 7, 2020 - link

    It would get complicated real fast, L1, L2, L3, L4 (main memory) and L5 (SSD or what most people would call a page fault). But regardless, the answer is 2X (AVX-512 will be 2X faster than AVX2 assuming all things are equal (which they ain't) including respective clocks (AVX carries a clock penalty)). The length of the respective pipelines doesn't matter for large arrays. Reply
  • wolfesteinabhi - Tuesday, January 7, 2020 - link

    we know what you have been doing there (title pic) ...

    IC IC on IC
    Reply
  • Lux88 - Tuesday, January 7, 2020 - link

    Some compilation benchmarks this time? Reply
  • satai - Tuesday, January 7, 2020 - link

    Yes, please. Reply
  • Santoval - Tuesday, January 7, 2020 - link

    TR 3990X is going to be seriously memory bottlenecked whenever all the cores are busy. 4 memory channels per 64 cores means that there is 1 memory channel per 16 cores. That is half the channels of the Ryzen 9 3950X, which is already slightly bottlenecked.
    Will TR 3990X's large amount of cache be enough to mitigate the issue of too little memory for too many cores?
    Reply
  • Rudde - Tuesday, January 7, 2020 - link

    I hope this gets addressed in the review. Reply
  • PickUrPoison - Tuesday, January 7, 2020 - link

    And in the benchmarks. What would be the best benchmark for memory bandwidth? It would be interesting to the difference of when the data is and is not in the cache (assuming both are reflective of real world usage). Reply

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