Around 15 months ago, AMD announced that it would be building 64-bit ARM based SoCs for servers in 2014. Less than a month into 2014, AMD made good on its promise and officially announced the Opteron A1100: a 64-bit ARM Cortex A57 based SoC.

The Opteron A1100 features either 4 or 8 AMD Cortex A57 cores. There's only a single die mask so we're talking about harvested die to make up the quad-core configuration. My guess is over time we'll see that go away entirely, but since we're at very early stages of talking about the A1100 there's likely some hedging of bets going on. Each core will run at a frequency somewhere north of 2GHz. The SoC is built on a 28nm process at Global Foundries.

Each pair of cores shares a 1MB L2 cache, for a total of up to 4MB of L2 cache for the chip. All cores share a unified L3 cache of up to 8MB in size. AMD designed a new memory controller for the Opteron A1100 that's capable of supporting both DDR3 or DDR4. The memory interface is 128-bits wide and supports up to 4 SODIMMs, UDIMMs or RDIMMs. AMD will be shipping a reference platform capable of supporting up to 128GB of Registered DDR3 DIMMs off of a single SoC.

Also on-die is an 8-lane PCIe 3.0 controller (1 x8 or 2 x4 slot configurations supported) and an 8-port 6Gbps SATA controller. AMD assured me that the on-chip fabric is capable of sustaining full bandwidth to all 8 SATA ports. The SoC features support for 2 x 10GbE ports and ARM's TrustZone technology. 

AMD will be making a reference board available to interested parties starting in March, with server and OEM announcements to come in Q4 of this year. 

It's still too early to talk about performance or TDPs, but AMD did indicate better overall performance than its Opteron X2150 (4-core 1.9GHz Jaguar) at a comparable TDP:

AMD Opteron A1100 vs. X2150
  CPU Core Configuration CPU Frequency SPECint_rate Estimate SPECint per Core Estimated TDP
AMD Opteron A1100 8 x ARM Cortex A57 >= 2GHz 80 10 25W
AMD Opteron X2150 4 x AMD Jaguar 1.9GHz 28.1 7 22W

AMD alluded to substantial cost savings over competing Intel solutions with support for similar memory capacities. AMD tells me we should expect a total "solution" price somewhere around 1/10th that of a competing high-end Xeon box, but it isn't offering specifics beyond that just yet. Given the Opteron X2150 performance/TDP comparison, I'm guessing we're looking at a similar ~$100 price point for the SoC. There's also no word on whether or not the SoC will leverage any of AMD's graphics IP.

The Opteron A1100 is aimed squarely at those applications that either need a lot of low power compute or tons of memory/storage. AMD sees huge demand in the memcached space, cold storage servers and Apache web front ends. The offer is pretty simple: take cost savings on the CPU front and pour it into more DRAM.

Early attempts at ARM based server designs were problematic given the lack of a 64-bit ARM ISA. With ARMv8 and the Cortex A53/A57 CPUs, that's all changed. I don't suspect solutions like the Opteron A1100 to be a knockout success immediately, but this is definitely the beginning of something very new. Of all of the players in the ARM enterprise space, AMD looks like one of the most credible threats. It's also a great way for AMD to rebuild its enterprise marketshare with a targeted strike in new/growing segments. 

AMD's Andrew Feldman included one of his trademark reality check slides in his Opteron A1100 presentation today:

Lower cost, high volume CPUs have always won. That's how Intel took the server market to begin with. The implication here is that ARM will do the same to Intel. Predicting 25% of the server market by 2019 may be feasible, but I'm not fond of making predictions for what the world will look like 5 years from now. 

The real question is what architecture(s) AMD plans to use to get to a leadership position among ARM CPUs and a substantial share of the x86 CPU market. We get the first hint with the third bullet above: "smaller more efficient x86 CPUs will be dominant in the x86 segment".

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  • tuxRoller - Wednesday, January 29, 2014 - link

    KVM has been ported since, iirc, 3.11. Xen was ported a bit earlier. Reply
  • MrSpadge - Wednesday, January 29, 2014 - link

    With a dual channel RAM interface and DDR4 these will be limited to 2 modules. I doubt there'll be 64 GB DDR4 modules anytime soon. But then 8 cores of moderate performance should be fine with DDR3 bandwidth.

    Anyway, it's a shame they didn't introduce this memory controller for Kabini (either 2 channels DDR3 or with DDR4 at least a single channel), as its GPU needs more bandwidth. And for Kaveri, as its GPU desperately needs bandwidth!
    Reply
  • maxi2mc - Wednesday, January 29, 2014 - link

    Actually they have this controller for Kaveri, but for some reason it's not activated/functional, or not yet. See this article about using only channel 0 and 3 for DDR3 http://www.anandtech.com/show/7702/amd-kaveri-docs... .

    On Phenom II they had a memory controller that supported both DDR2 and DDR3.

    The real problem is having a different socket to support another kind of DDR, maybe DDR4, or DDR3 + GDDR5 soldered.
    Reply
  • extide - Wednesday, January 29, 2014 - link

    May be a similar memory controller but not the exact same one. The kaveri one has 128bit DDR3 (2x64) and an optional 256bit GDDR5 (4x64) controller mode, where as the memory controller here is always 128bit (2x64), however can do DDR3 or DDR4. Reply
  • extide - Wednesday, January 29, 2014 - link

    With registered modules you can have more than 1 per channel with DDR4. Reply
  • SpaceRanger - Wednesday, January 29, 2014 - link

    Sever Market?? Hope it's a clean cut at least! Reply
  • BSMonitor - Wednesday, January 29, 2014 - link

    In the server space, compatibility will always be a major factor. VLIW IA-64 was never able to penetrate the x86 market mostly because x86 emulation was never very good. Getting companies away from their legacy software is always a huge challenge to any new CPU architecture that might rival x86. Reply
  • factual - Wednesday, January 29, 2014 - link

    Given the existence of Intel Avoton, I really don't see the point of merchant chip designers competing in the server space using ARM-based CPU chips. Here's why:

    1. Almost all of the software in the server space was developed/validated for x86, so ARM ISA in server space is at a huge disadvantage.

    2. Even of all the software was ported to ARM, Intel's Silvermont core (used in Avoton) currently beats all ARM-designed CPU cores as well as all ARM-compatible cores design by merchant designers like Qualcomm, in terms of perf/watt.

    3. Intel's 14nm atom core will further widen the perf/watt gap between atom and ARM CPU cores. And give Intel's huge process technology advantage and it's recent focus on low-power design, I see this trend continuing in the future.

    AMD would be much better off focusing on developing a low power x86 core and trying to compete Intel on price.
    Reply
  • Guspaz - Wednesday, January 29, 2014 - link

    Most Linux servers could migrate from x86 to ARM and never know the difference. More than that, if you were told to set up a LAMP stack on two servers, one being x86 and one being ARM, you wouldn't even realize which was which unless you specifically checked. Because distros have the relevant software for both ISAs, and your install process is going to be identical. Reply
  • factual - Wednesday, January 29, 2014 - link

    Many of the enterprise distros are not actively supporting ARM or are supporting ARM with a lag. Also, I was primarily referring to apps rather than the os itself. For example, More than 90% of the apps used by the company I work for (version control, engineering design CAD tools, etc.) are not available for ARM ISA. Reply

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